luis@luispazzanese:~$ whoami
Computer Engineering student at Insper — embedded systems, FPGA/VHDL hardware design and cloud infrastructure.
I write real-time firmware for ARM microcontrollers, design digital hardware in VHDL and am building cloud infrastructure from bare metal to AWS. Looking for an engineering internship at a big tech company — open to relocation.
Currently in the 6th semester; expected graduation Dec 2028.
Independent real estate asset manager in São Paulo, R$2B+ under management, with two listed funds (GGRC11, ZAGH11). Internship alongside classes in 2025; the code is internal.
Insper’s cybersecurity club. Left to free up time for the hardware projects below.
Course projects on the RP2350 (dual Cortex-M33), all in C with the Pico SDK. The three below are the ones worth reading.
MPU6050 IMU sampled at 100 Hz over I2C, fused into orientation with the Madgwick-based Fusion AHRS and streamed as a 4-byte binary protocol to a Python host that moves the cursor. Four FreeRTOS tasks decoupled by three queues and one semaphore; a flick gesture clicks, with refractory-period debouncing.
Custom ILI9341 240×320 TFT driver plus 4-wire resistive touch read through the ADC (64-sample averaging, pressure gate), driving a unipolar stepper in half-step mode with an animated direction indicator.
HC-SR04 ranging that never blocks: trigger via SDK alarms, echo timed with rising/falling-edge GPIO IRQs and time_us_64(), a 50 ms watchdog alarm flags lost echoes, and the period is reconfigurable over a serial CLI.
What this semester is producing. The stepper IP is done; the CPU and the spider are in progress.
Elective deliverable (Embedded Linux and SoC): a VHDL IP core driving a unipolar stepper from a DE10-Standard (Cyclone V). Step rate comes from a phase accumulator (DDS-style), so a trapezoidal acceleration ramp costs one adder and no divider; braking distance is found by mirroring the ramp instead of computing v²/2a. Single 50 MHz clock domain with clock enables, two-flop synchronisers, a self-checking testbench with 7 cases, and +13 ns setup slack / 168 ALMs after synthesis. The README explains every decision.
Embedded, hardware, software or cloud engineering. 30 h/week during the semester (the standard São Paulo internship), available to start immediately, open to relocation.